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Compact Modeling of Multi-layered MoS2 FETs including Negative Capacitance Effect
dc.contributor.author | Nandan, Keshari | |
dc.contributor.author | Toral López, Alejandro | |
dc.contributor.author | Marin-Sanchez, Antonio | |
dc.contributor.author | García Ruiz, Francisco Javier | |
dc.contributor.author | González Marín, Enrique | |
dc.date.accessioned | 2020-12-21T11:49:41Z | |
dc.date.available | 2020-12-21T11:49:41Z | |
dc.date.issued | 2020 | |
dc.identifier.citation | Nandan, K., Yadav, C., Rastogi, P., Toral-Lopez, A., Marin-Sanchez, A., Marin, E. G., ... & Chauhan, Y. S. (2020). Compact Modeling of Multi-Layered MoS 2 FETs Including Negative Capacitance Effect. IEEE Journal of the Electron Devices Society, 8, 1177-1183. [DOI 10.1109/JEDS.2020.3021031] | es_ES |
dc.identifier.uri | http://hdl.handle.net/10481/65070 | |
dc.description.abstract | Abstract—In this paper, we present a channel thickness dependent analytical model for MoS2 symmetric double-gate FETs including negative capacitance (NC) effect. In the model development, first thickness dependent model of the baseline 2D FET is developed, and later NC effect is included in the model using the Landau-Khalatnikov (L-K) relation. To validate baseline model behavior, density functional theory (DFT) calculations are taken into account to obtain numerical data for the K and valley dependent effective masses and differences in the energy levels of N-layer (N = 1, 2, 3, 4, and 5) MoS2. The calculated layer dependent parameters using DFT theory are further used in a drift-diffusion simulator to obtain electric characteristics of the baseline 2D FET for model validation. The model shows excellent match for drain current and total gate capacitance of baseline FET and NCFET against the numerical simulation. Index Terms—Metal-oxide-semiconductor field-effect transistor (MOSFET), Compact modeling, molybdenum disulfide (MoS2), transition metal dichalcogenide (TMD), Double Gate (DG), Negative Capacitance FET (NCFET). | es_ES |
dc.description.sponsorship | Swarnajayanti Fellowship | es_ES |
dc.description.sponsorship | FIST Scheme of Department of Science and Technology (DST), Government of India | es_ES |
dc.description.sponsorship | Spanish Government Grant FPU16/04043 | es_ES |
dc.description.sponsorship | Juan de la Cierva Incorporación (MINECO/AEI) IJCI-2017-32297 | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | IEEE-INST Electrical Electronics Engineers INC | es_ES |
dc.rights | Atribución 3.0 España | * |
dc.rights.uri | http://creativecommons.org/licenses/by/3.0/es/ | * |
dc.title | Compact Modeling of Multi-layered MoS2 FETs including Negative Capacitance Effect | es_ES |
dc.type | journal article | es_ES |
dc.rights.accessRights | open access | es_ES |
dc.identifier.doi | 10.1109/JEDS.2020.3021031 | |
dc.type.hasVersion | VoR | es_ES |