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Extended analysis of the Z2-FET: Operation as capacitor-less eDRAM
dc.contributor.author | Navarro Moral, Carlos | es_ES |
dc.contributor.author | Lacord, Joris | es_ES |
dc.contributor.author | Parihar, Mukta Singh | es_ES |
dc.contributor.author | Adamu-Lema, Fikru | es_ES |
dc.contributor.author | Duan, Meng | es_ES |
dc.contributor.author | Rodríguez Santiago, Noel | es_ES |
dc.contributor.author | Cheng, Binjie | es_ES |
dc.contributor.author | El Dirani, Hassam | es_ES |
dc.contributor.author | Barbe, Jean-Charles | es_ES |
dc.contributor.author | Fonteneau, Pascal | es_ES |
dc.contributor.author | Bawedin, Maryline | es_ES |
dc.contributor.author | Millar, Campbell | es_ES |
dc.contributor.author | Galy, Philippe | es_ES |
dc.contributor.author | Le Royer, Cyrille | es |
dc.contributor.author | Karg, Sigfried | es |
dc.contributor.author | Wells, Paul | es |
dc.contributor.author | Kim, Yong Tae | es |
dc.contributor.author | Asenov, Asen | es |
dc.contributor.author | Cristoloveanu, Sorin | es |
dc.contributor.author | Gámiz Pérez, Francisco Jesús | es |
dc.date.accessioned | 2017-10-24T12:14:16Z | |
dc.date.available | 2017-10-24T12:14:16Z | |
dc.date.issued | 2017-11-01 | |
dc.identifier.citation | Navarro Moral, C.; et al. Extended analysis of the Z2-FET: Operation as capacitor-less eDRAM. IEEE Transactions on Electron Devices, 64(11): 4486-4491 (2017). [http://hdl.handle.net/10481/47952] | es_ES |
dc.identifier.issn | 0018-9383 | |
dc.identifier.uri | http://hdl.handle.net/10481/47952 | |
dc.description | This article has been accepted for publication by IEEE "Navarro Moral, C.; et al. Extended analysis of the Z2-FET: Operation as capacitor-less eDRAM. IEEE Transactions on Electron Devices, 64(11): 4486-4491 (2017). DOI: 10.1109/TED.2017.2751141 | en_EN |
dc.description | (c) 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works." | en_EN |
dc.description.abstract | The Z2-FET operation as capacitorless DRAM is analyzed using advanced 2-D TCAD simulations for IoT applications. The simulated architecture is built based on actual 28-nm fully depleted silicon-on-insulator devices. It is found that the triggering mechanism is dominated by the front-gate bias and the carrier’s diffusion length. As in other FB-DRAMs, the memory window is defined by the ON voltage shift with the stored body charge. However, the Z2-FET’s memory state is not exclusively defined by the inner charge but also by the reading conditions. | en_EN |
dc.language.iso | eng | es_ES |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | es_ES |
dc.relation | info:eu-repo/grantAgreement/EC/H2020/687931 | es_ES |
dc.rights | Creative Commons Attribution-NonCommercial-NoDerivs 3.0 License | |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/ | |
dc.subject | Semiconductor memories | en_EN |
dc.subject | Low-power | en_EN |
dc.subject | T-Dram | en_EN |
dc.subject | Capacitorless | en_EN |
dc.subject | Feedback effect | en_EN |
dc.subject | Fully depleted (FD) | en_EN |
dc.subject | Ground plane | en_EN |
dc.subject | Lifetime | en_EN |
dc.subject | Sharp switch | en_EN |
dc.subject | Silicon-on-insulator | en_EN |
dc.subject | Z2-FET | en_EN |
dc.title | Extended analysis of the Z2-FET: Operation as capacitor-less eDRAM | en_EN |
dc.type | journal article | es_ES |
dc.rights.accessRights | open access | es_ES |
dc.identifier.doi | 10.1109/TED.2017.2751141 |
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