Rule-Based Design for Low-Cost Double-Node Upset Tolerant Self-Recoverable D-Latch
Metadatos
Afficher la notice complèteAuteur
Hatefinasab, Seyedehsomayeh; Morales Santos, Diego Pedro; Castillo Morales, María Encarnación; Rodríguez Santiago, NoelEditorial
IEEE
Materia
Delay-power-area product (DPAP) Double node upsets (DNU) High impedance state (HIS) Low cost single event double node upset tolerant (LSEDUT) Power-delay product (PDP) Single node upset (SNU) Soft error (SE)
Date
2023-01-03Referencia bibliográfica
S. Hatefinasab... [et al.]. "Rule-Based Design for Low-Cost Double-Node Upset Tolerant Self-Recoverable D-Latch," in IEEE Access, vol. 11, pp. 1732-1741, 2023, doi: [10.1109/ACCESS.2022.3233812]
Patrocinador
Spanish Government MCIN/AEI/10.13039/501100011033/FEDER PID2020-117344RB-I00; Regional Government P20_00265 P20_00633 B-RNM-680-UGR20Résumé
This paper presents a low-cost, self-recoverable, double-node upset tolerant latch aiming at
nourishing the lack of these devices in the state of the art, especially featuring self-recoverability while
maintaining a low-cost pro le. Thus, this D-latch may be useful for high reliability and high-performance
safety-critical applications as it can detect and recover faults happening during holding time in harsh radiation
environments. The proposed D-latch design is based on a low-cost single event double-node upset tolerant
latch and a rule-based double-node upset (DNU) tolerant latch which provides it with the self-recoverability
against DNU, but paired with a low transistor count and high performance. Simulation waveforms support
the achievements and demonstrate that this new D-latch is fully self-recoverable against double-node upset.
In addition, the minimum improvement of the delay-power-area product of the proposed rule-based design
for the low-cost DNU tolerant self-recoverable latch (RB-LDNUR) is 59%, compared with the latest DNU
self-recoverable latch on the literature.