Compact Modeling Technology for the Simulation of Integrated Circuits Based on Graphene Field-Effect Transistors
Metadatos
Mostrar el registro completo del ítemEditorial
Wiley
Materia
2D materials Compact modeling Graphene Hybrid integrated circuits Monolithic integrated circuits Radio-frequency Transistors
Fecha
2022-05-20Referencia bibliográfica
Pasadas, F... [et al.]. Compact Modeling Technology for the Simulation of Integrated Circuits Based on Graphene Field-Effect Transistors. Adv. Mater. 2022, 34, 2201691. [https://doi.org/10.1002/adma.202201691]
Patrocinador
European Commission 881603; Spanish Government European Commission RTI2018-097876-B-C21 European Commission; Departament de Recerca i Universitat 001-P-001702Resumen
The progress made toward the definition of a modular compact modeling
technology for graphene field-effect transistors (GFETs) that enables the electrical
analysis of arbitrary GFET-based integrated circuits is reported. A set of
primary models embracing the main physical principles defines the ideal GFET
response under DC, transient (time domain), AC (frequency domain), and noise
(frequency domain) analysis. Another set of secondary models accounts for the
GFET non-idealities, such as extrinsic-, short-channel-, trapping/detrapping-,
self-heating-, and non-quasi static-effects, which can have a significant impact
under static and/or dynamic operation. At both device and circuit levels, significant
consistency is demonstrated between the simulation output and experimental
data for relevant operating conditions. Additionally, a perspective of the
challenges during the scale up of the GFET modeling technology toward higher
technology readiness levels while drawing a collaborative scenario among fabrication
technology groups, modeling groups, and circuit designers, is provided.