TY - GEN AU - Castillo, E. AU - Morales Santos, Diego Pedro AU - GarcĂ­a, A. AU - Parrilla, L. AU - Todorovich, E. AU - Meyer Baese, Uwe PY - 2015 UR - https://hdl.handle.net/10481/98127 AB - HDL-level design offers important advantages for the application of watermarking to IP cores, but its complexity also requires tools automating these watermarking algorithms. A new tool for signature distribution through combinational logic is... LA - eng PB - Wiley TI - Design Time Optimization for Hardware Watermarking Protection of HDL Designs DO - 10.1155/2015/752969 ER -