TY  - GEN 
AU  - Ganeriwala, Mohit
AU  - García Ruiz, Francisco Javier
AU  - González Marín, Enrique
AU  - Mohapatra, Nihar
PY  - 2019
UR  - https://hdl.handle.net/10481/103401
AB  - Considering the demand of III–V multigate (MUG) transistors for next-generation CMOS technologies, a compactmodel is required to test their performance in different circuits. The low effective mass and highly confined geometry of these MUG devices...
LA  - eng
KW  - III–V
KW  - circuit simulation
KW  - compactmodeling
KW  - MOS transistor
KW  - nanowire (NW)
KW  - quantum capacitance
TI  - A Compact Charge and Surface Potential Model for III–V Cylindrical Nanowire Transistors
DO  - DOI: 10.1109/TED.2018.2866885
ER  -