Physics-based scalable compact model for terminal charge, intrinsic capacitance and drain current in nanosheet FETs Singh, Aishwarya Ganeriwala, Mohit Dineshkumar Mohapatra, Nihar Terminal charges Nanosheet FET Ward-Dutton Quantum confinement Bottom-up scalable compact model This work presents a physics-based SPICE compatible model for Nanosheet FETs, which provides explicit expressions for the drain current, terminal charges and intrinsic capacitances. The drain current model is based on the drift-diffusion formalism for carrier transport. The terminal charge and intrinsic capacitance models are calculated by adopting the Ward–Dutton linear charge partition scheme that guarantees charge conservation. The model uses the novel bottom-up approach to calculate the terminal charges, uses very few empirical parameters and is accurate across device dimensions and bias conditions. 2024-04-23T07:10:18Z 2024-04-23T07:10:18Z 2024 conference output Published version: Singh, Aishwarya; Ganeriwala, Mohit Dineshkumar; Mohapatra, Nihar. Physics-based scalable compact model for terminal charge, intrinsic capacitance and drain current in nanosheet FETs. 2024 https://hdl.handle.net/10481/91037 eng http://creativecommons.org/licenses/by-nc-nd/3.0/ open access Creative Commons Attribution-NonCommercial-NoDerivs 3.0 License