2QGRU: Power-of-Two Quantization for Efficient FPGA-Based Gated Recurrent Unit Architectures Molina Fernández, Luis Miguel Hu Chen, Shao Jie Méndez Gómez, Javier Morales Santos, Diego Pedro Pegalajar Cuéllar, Manuel López Vallejo, Marisa Field programmable gate arrays Power- and resource-constrained devices Quantization This paper proposes a power-of-two-based quantization technique aimed at improving the hardware efficiency of artificial neural networks (ANNs) implemented on field programmablegatearrays(FPGAs). Theeffectivenessoftheproposedapproachisvalidated using gated recurrent unit (GRU) models. The resulting architecture, referred to as 2QGRU, exploits parallelism, optimized operation scheduling, and fine-grained data bit-width management to achieve efficient hardware realization. Compared with state-of-the-art FPGA implementations based on sparsity compression, 2QGRU demonstrates superior performance in terms of resource utilization and power consumption, while eliminating the need for dedicated DSP blocks. Furthermore, area and power efficiency can be further improved by trading latency for reduced hardware cost through an integrated implemen tation reduction strategy, enabling deployment on highly resource-constrained devices. Finally, the 2QGRU model is integrated into an automated ANN framework, allowing the proposed quantization and hardware optimization techniques to be readily extended to other ANNmodels and FPGA-based deployments. 2026-02-13T11:20:41Z 2026-02-13T11:20:41Z 2026-02-07 journal article Molina Fernandez, M., Hu Chen, S. J., Mendez Gomez, J., Morales Santos, D. P., Pegalajar Cuellar, M., & Lopez-Vallejo, M. (2026). 2QGRU: Power-of-Two Quantization for Efficient FPGA-Based Gated Recurrent Unit Architectures. Electronics, 15(4), 722. https://doi.org/10.3390/electronics15040722 https://hdl.handle.net/10481/110975 10.3390/electronics15040722 eng http://creativecommons.org/licenses/by/4.0/ open access Atribución 4.0 Internacional MDPI