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Assessment of Frequency-induced Hysteresis Inversion in MoS2 FETs
dc.contributor.author | Cuesta-Lopez, Juan | |
dc.contributor.author | Ganeriwala, Mohit D. | |
dc.contributor.author | González Marín, Enrique | |
dc.contributor.author | Pasadas, Francisco | |
dc.contributor.author | Ruiz, Fran G. | |
dc.contributor.author | Godoy, Andres | |
dc.date.accessioned | 2024-04-23T10:25:57Z | |
dc.date.available | 2024-04-23T10:25:57Z | |
dc.date.issued | 2024 | |
dc.identifier.uri | https://hdl.handle.net/10481/91080 | |
dc.description.abstract | This work analyzes the combined effect of interface traps and mobile ions in the hysteretic performance of MoS2-based FETs. Clockwise or anti-clockwise hysteresis is observed depending on the voltage sweep rate, evidencing the different underlying physical mechanism associated with the charge/discharge of interface traps and ion displacement. The memory window resulting from the device hysteresis is analyzed as a function of the operating frequency showing non-zero values for 0.1 < f < 10 Hz (i.e. for the characteristic time of traps) and f > 10kHz (i.e the frequency-limited ion mobility). Both regions are separated by a frequency span where hysteresis is not present in the device response. The presented results constitute a first step towards a better understanding of the hysteretic behavior of iontronic devices and its potential application as analog memories. | es_ES |
dc.language.iso | eng | es_ES |
dc.rights | Creative Commons Attribution-NonCommercial-NoDerivs 3.0 License | es_ES |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/ | es_ES |
dc.title | Assessment of Frequency-induced Hysteresis Inversion in MoS2 FETs | es_ES |
dc.type | conference output | es_ES |
dc.rights.accessRights | open access | es_ES |