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A 2-D-Material FET Verilog-A Model for Analog Neuromorphic Circuit Design
dc.contributor.author | Dubey, Prabhat Kumar | |
dc.contributor.author | Strangio, Sebastiano | |
dc.contributor.author | González Marín, Enrique | |
dc.contributor.author | Iannaccone, Giuseppe | |
dc.contributor.author | Fiori, Gianluca | |
dc.date.accessioned | 2023-09-20T09:48:37Z | |
dc.date.available | 2023-09-20T09:48:37Z | |
dc.date.issued | 2023-08-07 | |
dc.identifier.citation | P. K. Dubey, S. Strangio, E. G. Marin, G. Iannaccone and G. Fiori, "A 2-D-Material FET Verilog-A Model for Analog Neuromorphic Circuit Design," in IEEE Transactions on Electron Devices, vol. 70, no. 9, pp. 4945-4952, Sept. 2023. [doi: 10.1109/TED.2023.3298876] | es_ES |
dc.identifier.uri | https://hdl.handle.net/10481/84513 | |
dc.description | This work was supported in part by the European Project through European Research Council (ERC) Printable Electronic on Paper Through 2D Material based Inks (PEP2D) under Grant 770047, in part by Origami Electronics for three-dimensional integration of computational devices (ORIGENAL) under Grant 828901, and in part by Quantum Engineering for Machine Learning (QUEFORMAL) under Grant 829035. The work of Enrique G. Marin was supported in part by MCIN/AEI/10.13039/501100011033 under Project PID2020-116518GB-I00 and in part by FEDER/Junta de Andalucia under Project A-TIC-646-UGR20. | es_ES |
dc.description.abstract | We present a charge-based Verilog-A model for 2-D-material (2DM)-based field-effect transistors (FETs) with application in neuromorphic circuit design. The model combines the explicit solution of the drift-diffusion transport and electrostatics, including Fermi-Dirac statistics. The Ward-Dutton linear charge partitioning scheme is then employed for terminal charges and capacitance calculations. The model accurately predicts the electrical behavior of experimental MoS2 FETs, and it is applied to simulate neuromorphic-circuit building blocks, including a floating-gate (FG) current-mirror (CM) vector-matrix multi-plier (VMM), extracting the effective number of bits under different operation conditions. | es_ES |
dc.description.sponsorship | European Project through European Research Council (ERC) Printable Electronic on Paper Through 2D Material based Inks (PEP2D) 770047 | es_ES |
dc.description.sponsorship | Origami Electronics for three-dimensional integration of computational devices (ORIGENAL) 828901 | es_ES |
dc.description.sponsorship | Quantum Engineering for Machine Learning (QUEFORMAL) 829035 | es_ES |
dc.description.sponsorship | MCIN/AEI PID2020-116518GB-I00 | es_ES |
dc.description.sponsorship | FEDER/Junta de Andalucia A-TIC-646-UGR20 | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | IEEE | es_ES |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | 2-D materials (2DMs) | es_ES |
dc.subject | Current mirror (CM) | es_ES |
dc.subject | Explicit compact model | es_ES |
dc.subject | Neural network | es_ES |
dc.subject | Vector-matrix multiplier (VMM) | es_ES |
dc.subject | Verilog-A model | es_ES |
dc.title | A 2-D-Material FET Verilog-A Model for Analog Neuromorphic Circuit Design | es_ES |
dc.type | journal article | es_ES |
dc.rights.accessRights | open access | es_ES |
dc.identifier.doi | 10.1109/TED.2023.3298876 | |
dc.type.hasVersion | VoR | es_ES |