https://hdl.handle.net/10481/47633 2026-04-05T01:07:37Z 2026-04-05T01:07:37Z Donetti, Luca Medina Bailón, Cristina Padilla De la Torre, José Luis Sampedro Matarín, Carlos Gámiz Pérez, Francisco Jesús https://hdl.handle.net/10481/110243 2026-01-26T09:26:02Z

On the Capacitance of Nanosheet Transistors Donetti, Luca; Medina Bailón, Cristina; Padilla De la Torre, José Luis; Sampedro Matarín, Carlos; Gámiz Pérez, Francisco Jesús The capacitance of the gate oxide is a crucial parameter to model the performance of MOSFETs. The traditional expression used to compute it stems from the parallel-plate capacitor formula. While its use is appropriate for planar devices, it has been naturally extended to 3-D devices such as those based on nanosheets even if the geometry is quite different. In this work, we compute numerically the gate oxide capacitance of nanosheet transistors and, observing a nonnegligible discrepancy with the planar model, we propose a simple model that better reproduces the computed capacitance. Then, we investigate the definition of equivalent oxide thickness (EOT), showing that it cannot be strictly used for nonplanar devices: however, our improved model allows us to obtain a useful expression valid for the most common cases. Finally, we generalize the capacitance model to nanosheets with rounded corners.

Medina Bailón, Cristina Padilla De la Torre, José Luis Donetti, Luca Navarro Moral, Carlos Sampedro Matarín, Carlos Gámiz Pérez, Francisco Jesús https://hdl.handle.net/10481/106723 2025-09-30T11:45:04Z

Geometrical variability impact on the gate tunneling leakage mechanisms in FinFETs Medina Bailón, Cristina; Padilla De la Torre, José Luis; Donetti, Luca; Navarro Moral, Carlos; Sampedro Matarín, Carlos; Gámiz Pérez, Francisco Jesús Given the critical role that quantum tunneling effects play in the behavior of nanoelectronic devices, it is essential to investigate the influence and restraints of these phenomena on the overall transistor performance. In this work, a previously developed gate leakage model, incorporated into an in-house 2D Multi-Subband Ensemble Monte Carlo simulation framework, is employed to analyze the leakage current flowing across the gate insulator. The primary objective is to evaluate how variations in key geometrical parameters (specifically, gate oxide and semiconductor thicknesses dimensions) affect the magnitude and bias dependence of tunnelinginduced leakage. Simulations are performed on a representative FinFET structure, and the results reveal that tunneling effects become increasingly pronounced at low gate voltages in devices with thinner oxides and thicker semiconductor thickness. These findings underscore the relevance of incorporating quantum tunneling mechanisms in predictive modeling of advanced transistor architectures.

Padilla De la Torre, José Luis Alper, C Medina Bailón, Cristina Gámiz Pérez, Francisco Jesús Ionescu, Adrian Mihai https://hdl.handle.net/10481/100711 2025-01-28T13:36:35Z

Assessment of Pseudo–Bilayer Structures in the Heterogate Germanium Electron–Hole Bilayer Tunnel Field–Effect Transistor Padilla De la Torre, José Luis; Alper, C; Medina Bailón, Cristina; Gámiz Pérez, Francisco Jesús; Ionescu, Adrian Mihai We investigate the effect of pseudo-bilayer configurations at low operating voltages (≤0.5 V) in the heterogate germanium electron-hole bilayer tunnel field-effect transistor (HG-EHBTFET) compared to the traditional bilayer structures of EHBTFETs arising from semiclassical simulations where the inversion layers for electrons and holes featured very symmetric profiles with similar concentration levels at the ON-state. Pseudo-bilayer layouts are attained by inducing a certain asymmetry between the top and the bottom gates so that even though the hole inversion layer is formed at the bottom of the channel, the top gate voltage remains below the required value to trigger the formation of the inversion layer for electrons. Resulting benefits from this setup are improved electrostatic control on the channel, enhanced gate-to-gate efficiency, and higher ION levels. Furthermore, pseudo-bilayer configurations alleviate the difficulties derived from confining very high opposite carrier concentrations in very thin structures.

Padilla De la Torre, José Luis Medina Bailón, Cristina Márquez González, Carlos Sampedro Matarín, Carlos Donetti, Luca Gámiz Pérez, Francisco Jesús Ionescu, Adrian Mihai https://hdl.handle.net/10481/100710 2025-01-28T10:38:04Z

Gate Leakage Tunneling Impact on the InAs/GaSb Heterojunction Electron–Hole Bilayer Tunneling Field–Effect Transistor Padilla De la Torre, José Luis; Medina Bailón, Cristina; Márquez González, Carlos; Sampedro Matarín, Carlos; Donetti, Luca; Gámiz Pérez, Francisco Jesús; Ionescu, Adrian Mihai Among the different types of bilayer tunneling field-effect transistors exploiting interband tunneling phenomena with tunneling directions aligned with gate-induced electric fields, the utilization of InAs/GaSb channels proves to be an appealing means to enhance ON-current levels. Ultrathin channel thicknesses make quantum confinement be the agent that closes the broken gap of the InAs/GaSb heterojunction leading to a staggered gap which blocks the tunneling current in the OFF state. In this paper, the gate leakage tunneling current is analyzed as one of the main critical processes degrading the performance of the proposed structure. Appropriate gate stacks of HfO2/Al2O3 combined with gate-to-drain underlaps are shown to effectively suppress this leakage tunneling, while at the same time, preserve an adequate electrostatic control over the channel. Simulation results for the most optimized configurations feature ON-state levels of up to 400μA/μm and subthreshold swings of ≈3 mV/dec over more than 7 decades of current.

Padilla De la Torre, José Luis Medina Bailón, Cristina Navarro Moral, Carlos Alper, C Gámiz Pérez, Francisco Jesús Ionescu, Adrian Mihai https://hdl.handle.net/10481/100706 2025-01-28T10:34:49Z

Analysis of the Heterogate Electron-Hole Bilayer Tunneling Field-Effect Transistor With Partially Doped Channels: Effects on Tunneling Distance Modulation and Occupancy Probabilities Padilla De la Torre, José Luis; Medina Bailón, Cristina; Navarro Moral, Carlos; Alper, C; Gámiz Pérez, Francisco Jesús; Ionescu, Adrian Mihai Within the research in bilayer tunneling field-effect transistors (TFETs) exploiting interband tunneling phenomena with tunneling directions aligned with gate-induced electric fields, simulation results for the heterogate electron-hole bilayer TFET (HG-EHBTFET) showed that this type of devices succeeded in suppressing the parasitic tunneling leakage currents appearing in EHBTFETs as a result of the variable quantization strength inside the channel. In this paper, and conversely to standard approaches with entirely intrinsic channels, we investigate the possibility of modulating the band-to-band tunneling (BTBT) distance by acting on the subband discretization profiles through partially doped channels. We also analyze the impact of this pocket doping inside the channel on the occupancy probabilities involved in the BTBT processes in a germanium HG-EHBTFET.