@misc{10481/68712,
year = {2021},
url = {http://hdl.handle.net/10481/68712},
abstract = {In this paper, a Soft Error Hardened D-latch with improved performance is proposed, also
featuring Single Event Upset (SEU) and Single Event Transient (SET) immunity. This novel D-latch
can tolerate particles as charge injection in different internal nodes, as well as the input and output
nodes. The performance of the new circuit has been assessed through different key parameters,
such as power consumption, delay, Power-Delay Product (PDP) at various frequencies, voltage,
temperature, and process variations. A set of simulations has been set up to benchmark the new
proposed D-latch in comparison to previous D-latches, such as the Static D-latch, TPDICE-based
D-latch, LSEH-1 and DICE D-latches. A comparison between these simulations proves that the
proposed D-latch not only has a better immunity, but also features lower power consumption, delay,
PDP, and area footprint. Moreover, the impact of temperature and process variations, such as aspect
ratio (W/L) and threshold voltage transistor variability, on the proposed D-latch with regard to
previous D-latches is investigated. Specifically, the delay and PDP of the proposed D-latch improves
by 60.3% and 3.67%, respectively, when compared to the reference Static D-latch. Furthermore, the
standard deviation of the threshold voltage transistor variability impact on the delay improved
by 3.2%, while its impact on the power consumption improves by 9.1%. Finally, it is shown that
the standard deviation of the (W/L) transistor variability on the power consumption is improved
by 56.2%.},
publisher = {MDPI},
keywords = {Hardened D-latch},
keywords = {Complementary Metal Oxide Semiconductor (CMOS) technology},
keywords = {Power-Delay Product (PDP)},
keywords = {Soft Error (SE)},
keywords = {SEU (Single Event Upset)},
keywords = {High Impedance State (HIS)},
keywords = {Single event transient (SET)},
title = {Low-Cost Soft Error Robust Hardened D-Latch for CMOS Technology Circuit},
doi = {10.3390/electronics10111256},
author = {Hatefinasab, Seyedehsomayeh and Rodríguez Santiago, Noel and García Ríos, Antonio and Castillo Morales, María Encarnación},
}