@misc{10481/68147,
year = {2021},
month = {3},
url = {http://hdl.handle.net/10481/68147},
abstract = {In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.},
organization = {German Research Foundation (DFG)

SFB1461},
organization = {Federal Ministry of Education & Research (BMBF)

16ES1002
16FMD01K
16FMD02
16FMD03},
organization = {Spanish Ministry of Science, Innovation and Universities},
organization = {European Commission

TEC2017-84321-C4-3-R},
organization = {government of Andalusia (Spain) 

A.TIC.117.UGR18},
organization = {Leibniz Association},
publisher = {MDPI},
keywords = {RRAM},
keywords = {1T-1R},
keywords = {Multilevel},
keywords = {Compact modeling},
keywords = {Verilog-A},
keywords = {Artificial neural network},
title = {Toward Reliable Compact Modeling of Multilevel 1T-1R RRAM Devices for Neuromorphic Systems},
doi = {10.3390/electronics10060645},
author = {Pérez-Bosch Quesada, Emilio and Romero Zaliz, Rocio Celeste and Jiménez Molinos, Francisco and Roldán Aranda, Juan Bautista},
}