@misc{10481/57455,
year = {2019},
month = {8},
url = {http://hdl.handle.net/10481/57455},
abstract = {Dynamic random access memory (DRAM) cells are commonly used in electronic devices and are formed from a single transistor and capacitor. Alternative approaches, which are based on the floating body effect, have been proposed that could reduce
manufacturing complexity and minimize the cell footprint by removing the external capacitor. Such capacitor-less DRAM has
been demonstrated in silicon, but the use of other materials, including III–V compound semiconductors, remains relatively
unexplored, despite the fact that they could lead to enhanced performance. Here we report capacitor-less one-transistor DRAM
cells based on indium gallium arsenide (InGaAs). With our InGaAs on insulator transistors, we demonstrate different current
levels for each logic state, and thus successful memory behaviour, down to a gate length of 14 nm.},
organization = {H2020 REMINDER European (grant agreement No 687931) and TEC2014-59730 and P12-TIC-1996 National projects are thanked for financial support},
keywords = {1T-DRAM},
keywords = {III-V},
keywords = {Indium Galium Arsenide},
keywords = {MSDRAM},
keywords = {Capacitorless},
keywords = {Fully depleted (FD)},
keywords = {MSDRAM},
title = {Capacitor-less dynamic random access memory based on a III–V transistor with a gate length of 14 nm},
doi = {10.1038/s41928-019-0282-6},
author = {Navarro Moral, Carlos and Karg, Sigfried and Márquez González, Carlos and Navarro Moral, Santiago and Convertino, Clarissa and Zota, Cezar and Czornomaz, Lukas and Gámiz Pérez, Francisco Jesús},
}