@misc{10481/45904,
year = {2017},
url = {http://hdl.handle.net/10481/45904},
abstract = {The aim of the work herein presented in this PhD thesis is to study, through the electrical characterization, the reliability issues derived from the scaling down of the state-of-the-art Silicon-On-Insulator transistors. The miniaturization of the dimensions of the transistor has been the trend which semiconductor industry has followed in order to increase the number of devices per chip and, subsequently, the performance of the circuit. However, the reduction of the gate oxide thickness and the gate length, mandatory to follow the scaling rules, have implied the introduction of new dielectric materials and device structures. These advances have also introduced new instability sources which may affect the performance and the reliability of the devices.},
organization = {Tesis Univ. Granada. Departamento de Electrónica y Tecnología de los Computadores},
publisher = {Universidad de Granada},
keywords = {Transistores},
keywords = {Magnitudes eléctricas},
keywords = {Semiconductores},
keywords = {Caracterización},
keywords = {Dispositivos dieléctricos},
keywords = {Polarización (Electricidad)},
keywords = {Ionización},
title = {Electrical characterization of reability in advanced silicon-on-insulator structures for sub-22NM technologies},
author = {Márquez González, Carlos},
}