Assessment of Frequency-induced Hysteresis Inversion in MoS2 FETs

Abstract

This work analyzes the combined effect of interface traps and mobile ions in the hysteretic performance of MoS2-based FETs. Clockwise or anti-clockwise hysteresis is observed depending on the voltage sweep rate, evidencing the different underlying physical mechanism associated with the charge/discharge of interface traps and ion displacement. The memory window resulting from the device hysteresis is analyzed as a function of the operating frequency showing non-zero values for 0.1 < f < 10 Hz (i.e. for the characteristic time of traps) and f > 10kHz (i.e the frequency-limited ion mobility). Both regions are separated by a frequency span where hysteresis is not present in the device response. The presented results constitute a first step towards a better understanding of the hysteretic behavior of iontronic devices and its potential application as analog memories.