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Neuromorphic and logic circuit simulation using in-house fabricated GrAphene-based MEmristor (GAME)
| dc.contributor.author | Fernandez-Sanchez, Mari Carmen | |
| dc.contributor.author | García Palomo, Mikel | |
| dc.contributor.author | Ganeriwala, Mohit D. | |
| dc.contributor.author | Motos, Roberto | |
| dc.contributor.author | Medina-Rull, Alberto | |
| dc.contributor.author | Pasadas Cantos, Francisco | |
| dc.contributor.author | González Marín, Enrique | |
| dc.contributor.author | Godoy Medina, Andrés | |
| dc.contributor.author | Ruiz, Fran G. | |
| dc.date.accessioned | 2024-04-19T06:36:45Z | |
| dc.date.available | 2024-04-19T06:36:45Z | |
| dc.date.issued | 2023 | |
| dc.identifier.uri | https://hdl.handle.net/10481/90894 | |
| dc.description.sponsorship | Funded by FEDER/Junta de Andalucía through projects A-TIC-646-UGR20 and P20_00633; Spanish Govern- ment through project PID2020-116518GB-I00; and EU through project H2020-MSCA-IF 2020. | es_ES |
| dc.language.iso | eng | es_ES |
| dc.rights | Creative Commons Attribution-NonCommercial-NoDerivs 3.0 License | es_ES |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/ | es_ES |
| dc.title | Neuromorphic and logic circuit simulation using in-house fabricated GrAphene-based MEmristor (GAME) | es_ES |
| dc.type | info:eu-repo/semantics/conferenceObject | es_ES |
| dc.rights.accessRights | info:eu-repo/semantics/openAccess | es_ES |
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