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Please use this identifier to cite or link to this item: http://hdl.handle.net/10481/45904

Title: Electrical characterization of reability in advanced silicon-on-insulator structures for sub-22NM technologies
Authors: Márquez González, Carlos
Direction: Rodríguez Santiago, Noel
Gámiz Pérez, Francisco
Collaborator: Universidad de Granada. Departamento de Electrónica y Tecnología de los Computadores
Issue Date: 2017
Submitted Date: 23-Mar-2017
Abstract: The aim of the work herein presented in this PhD thesis is to study, through the electrical characterization, the reliability issues derived from the scaling down of the state-of-the-art Silicon-On-Insulator transistors. The miniaturization of the dimensions of the transistor has been the trend which semiconductor industry has followed in order to increase the number of devices per chip and, subsequently, the performance of the circuit. However, the reduction of the gate oxide thickness and the gate length, mandatory to follow the scaling rules, have implied the introduction of new dielectric materials and device structures. These advances have also introduced new instability sources which may affect the performance and the reliability of the devices.
Sponsorship: Tesis Univ. Granada. Departamento de Electrónica y Tecnología de los Computadores
Publisher: Universidad de Granada
Keywords: Transistores
Magnitudes eléctricas
Semiconductores
Caracterización
Dispositivos dieléctricos
Polarización (Electricidad)
Ionización
UDC: 53
537
(043.2)
2512
URI: http://hdl.handle.net/10481/45904
ISBN: 9788491631712
Rights : Creative Commons Attribution-NonCommercial-NoDerivs 3.0 License
Citation: null
Márquez González, C. Electrical characterization of reability in advanced silicon-on-insulator structures for sub-22NM technologies. Granada: Universidad de Granada, 2017. [http://hdl.handle.net/10481/45904]
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