Universidad de Granada Digibug

Repositorio Institucional de la Universidad de Granada >
1.-Investigación >
OpenAIRE (Open Access Infrastructure for Research in Europe) >

Please use this identifier to cite or link to this item: http://hdl.handle.net/10481/22390

Title: FPGA Implementation for real-time background subtraction based on horprasert model
Authors: Rodríguez-Gómez, Rafael
Fernández-Sánchez, Enrique J.
Díaz, Javier
Ros, Eduardo
Issue Date: 5-Jan-2012
Abstract: Background subtraction is considered the first processing stage in video surveillance systems, and consists of determining objects in movement in a scene captured by a static camera. It is an intensive task with a high computational cost. This work proposes an embedded novel architecture on FPGA which is able to extract the background on resource-limited environments and offers low degradation (produced because of the hardware-friendly model modification). In addition, the original model is extended in order to detect shadows and improve the quality of the segmentation of the moving objects. We have analyzed the resource consumption and performance in Spartan3 Xilinx FPGAs and compared to others works available on the literature, showing that the current architecture is a good trade-off in terms of accuracy, performance and resources utilization. With less than a 65% of the resources utilization of a XC3SD3400 Spartan-3A low-cost family FPGA, the system achieves a frequency of 66.5 MHz reaching 32.8 fps with resolution 1,024 x 1,024 pixels, and an estimated power consumption of 5.76 W.
Sponsorship: This research was supported by the projects of excellence from the Andalusian Regional Government, Junta de Andalucía (TIC-3873, TIC-5060), the national project ARC-VISION (TEC2010-15396) and the EU grant TOMSY (FP7-270436).
Publisher: MDPI AG
Keywords: Real time image processing
Reconfigurable architectures
Performance analysis
Video surveillance
URI: http://hdl.handle.net/10481/22390
ISSN: 1424-8220
Rights : Creative Commons Attribution-NonCommercial-NoDerivs 3.0 License
Citation: Rodríguez-Gómez, R.; Fernández-Sánchez, E. J.; Díaz, J.; Ros, E. FPGA implementation for real-time background subtraction based on horpraset model. Sensors 12(1): 585-611 (2012). [http://hdl.handle.net/10481/22390]
Appears in Collections:OpenAIRE (Open Access Infrastructure for Research in Europe)

Files in This Item:

File Description SizeFormat
sensors-12-00585.pdf6.18 MBAdobe PDFView/Open
Recommend this item

This item is licensed under a Creative Commons License
Creative Commons

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.


Valid XHTML 1.0! OpenAire compliant DSpace Software Copyright © 2002-2007 MIT and Hewlett-Packard - Feedback

© Universidad de Granada